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ADS1217 参数 Datasheet PDF下载

ADS1217图片预览
型号: ADS1217
PDF下载: 下载PDF文件 查看货源
内容描述: 8通道,24位模拟数字转换器 [8-Channel, 24-Bit ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器
文件页数/大小: 28 页 / 454 K
品牌: BB [ BURR-BROWN CORPORATION ]
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ELECTRICAL CHARACTERISTICS: AVDD = 3V  
All specifications at –40°C to +85°C, AVDD = +3V, DVDD = +2.7V to 5.25V, fMOD = 19.2kHz, PGA = 1, Buffer ON, RDAC = 75k, fDATA = 10Hz, and VREF = +1.25V,  
unless otherwise specified.  
ADS1217  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
ANALOG INPUT (AIN0 AIN7, AINCOM  
Full-Scale Input Voltage  
Analog Input Range  
)
(AIN+) – (AIN–  
Buffer OFF  
Buffer ON  
Buffer OFF  
Buffer ON  
)
±2VREF /PGA  
V
V
V
MΩ  
nA  
AGND – 0.1  
AGND + 0.05  
AVDD + 0.1  
AVDD – 1.5  
Input Impedance  
Input Current  
10/PGA  
0.5  
Bandwidth  
Fast Settling Filter  
Sinc2 Filter  
Sinc3 Filter  
–3dB  
–3dB  
–3dB  
0.469fDATA  
0.318fDATA  
0.262fDATA  
Hz  
Hz  
Hz  
Programmable Gain Amplifier  
Burnout Current Sources  
User Selectable Gain Ranges  
1
8
128  
2
µA  
OFFSET DAC  
Offset DAC Range  
Offset DAC Monotonicity  
Offset DAC Gain Error  
Offset DAC Gain Error Drift  
±VREF /(PGA)  
V
Bits  
%
±1  
2
ppm/°C  
SYSTEM PERFORMANCE  
Resolution  
No Missing Codes  
Integral Nonlinearity  
24  
Bits  
Bits  
% of FSR(1)  
Sinc3 Filter  
End Point Fit, Differential Input,  
Buffer Off, T = 25°C  
24  
0.0012  
0.0003  
Offset Error  
Offset Drift  
Gain Error  
Gain Error Drift  
Common-Mode Rejection  
Before Calibration  
15  
0.04  
0.010  
1.0  
ppm of FSR  
ppm of FSR/°C  
Before Calibration  
%
ppm/°C  
dB  
at DC  
100  
f
CM = 60Hz, fDATA = 10Hz  
130  
120  
120  
100  
100  
dB  
dB  
dB  
dB  
fCM = 50Hz, fDATA = 50Hz  
fCM = 60Hz, fDATA = 60Hz  
Normal-Mode Rejection  
f
f
SIG = 50Hz, fDATA = 50Hz  
SIG = 60Hz, fDATA = 60Hz  
dB  
Output Noise  
Power-Supply Rejection  
See Typical Characteristics  
90  
(2)  
at DC, dB = –20 log(VOUT /VDD  
)
75  
dB  
VOLTAGE REFERENCE INPUT  
Reference Input (VREF  
Negative Reference Input (VREF–  
Positive Reference Input (VREF+  
Common-Mode Rejection  
Common-Mode Rejection  
Bias Current(3)  
)
VREF (VREF+) – (VREF–  
)
0.1  
1.25  
1.3  
V
V
V
dB  
dB  
µA  
)
AGND – 0.1  
(VREF–) + 0.1  
(VREF+) – 0.1  
AVDD + 0.1  
)
at DC  
120  
120  
0.65  
fVREFCM = 60Hz, fDATA = 60Hz  
VREF = 1.25V  
ON-CHIP VOLTAGE REFERENCE  
Output Voltage  
Short-Circuit Current Source  
Short-Circuit Current Sink  
Drift  
Noise  
Output Impedance  
Startup Time  
REF HI = 0  
1.2  
1.25  
3
50  
15  
10  
3
1.3  
V
mA  
µA  
ppm/°C  
µVrms  
VRCAP = 0.1µF, BW = 0.1Hz to 100Hz  
Sourcing 100µA  
5
ms  
IDAC  
Full-Scale Output Current  
RDAC = 75k, Range = 1  
RDAC = 75k, Range = 2  
RDAC = 75k, Range = 3  
RDAC = 15k, Range = 3  
0.5  
1
2
mA  
mA  
mA  
mA  
kΩ  
Bits  
V
20  
Current Setting Resistance (RDAC  
Monotonicity  
Compliance Voltage  
Output Impedance  
PSRR  
)
10  
8
0
RDAC = 75kΩ  
AVDD – 1  
See Typical Characteristics  
VOUT = AVDD /2, Code > 16  
Individual IDAC  
600  
5
ppm/V  
%
Gain Error  
Gain Error Drift  
Gain Error Mismatch  
Gain Error Mismatch Drift  
Individual IDAC  
Between IDACs, Same Range and Code  
Between IDACs, Same Range and Code  
75  
0.25  
15  
ppm/°C  
%
ppm/°C  
NOTES: (1) FSR is Full-Scale Range. (2) VOUT is change in digital result. (3) 12pF switched capacitor at fSAMP clock frequency.  
ADS1217  
SBAS260B  
4
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