SPECIFICATIONS
All specifications TMIN to TMAX, AVDD = DVDD = +5V, fXIN = 10MHz, programmable gain amplifier setting of 1, Turbo Mode Rate of 1, REFOUT disabled,VBIAS disabled,
and external 2.5V reference, unless otherwise specified.
ADS1210U, P/ADS1211U, P, E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG INPUT
Input Voltage Range(1)
0
–10
+5
+10
V
V
MΩ
(2)
With VBIAS
Input Impedance
Programmable Gain Amplifier
Input Capacitance
G = Gain, TMR = Turbo Mode Rate
User Programmable: 1, 2, 4, 8, or 16
4/(G • TMR)(3)
1
16
8
5
pF
pA
nA
Input Leakage Current
At +25°C
At TMIN to TMAX
50
1
SYSTEMS PERFORMANCE
Resolution
No Missing Codes
Integral Linearity
24
Bits
Bits
%FSR
%FSR
fDATA = 60Hz
fDATA = 60Hz
fDATA = 1000Hz, TMR of 16
22
±0.0015
±0.0015
Unipolar Offset Error(4)
Unipolar Offset Drift(6)
Gain Error(4)
See Note 5
1
µV/°C
See Note 5
Gain Error Drift(6)
1
115
115
µV/°C
dB
dB
dB
dB
Common-Mode Rejection(9)
At DC, +25°C
100
90
160
160
100
100
At DC, TMIN to TMAX
50Hz, fDATA = 50Hz(7)
60Hz, fDATA = 60Hz(7)
50Hz, fDATA = 50Hz(7)
60Hz, fDATA = 60Hz(7)
Normal-Mode Rejection
dB
dB
Output Noise
See Typical Performance Curves
Power Supply Rejection
DC, 50Hz, and 60Hz
65
dB
VOLTAGE REFERENCE
Internal Reference (REFOUT
Drift
Noise
Load Current
Output Impedance
)
2.4
2.5
25
50
2.6
1
V
ppm/°C
µVp-p
mA
Source or Sink
2
Ω
External Reference (REFIN
Load Current
VBIAS Output
Drift
Load Current
)
2.0
3.0
2.5
3.45
V
µA
V
Using Internal Reference
Source or Sink
3.15
3.3
50
ppm/°C
10mA
DIGITAL INPUT/OUTPUT
Logic Family
TTL Compatible CMOS
Logic Level: (all except XIN
)
VIH
VIL
VOH
IIH = +5µA
IIL = +5µA
IOH = 2 TTL Loads
IOL = 2 TTL Loads
2.0
–0.3
2.4
DVDD +0.3
0.8
V
V
V
V
V
VOL
XIN Input Levels: VIH
VIL
XIN Frequency Range (fXIN
Output Data Rate (fDATA
0.4
DVDD +0.3
0.8
10
15,625
781
3.5
–0.3
0.5
2.4
0.12
V
)
MHz
Hz
Hz
)
User Programmable
fXIN = 500kHz
Data Format
User Programmable
Two’s Complement
or Offset Binary
SYSTEM CALIBRATION
Offset and Full-Scale Limits
VFS – | VOS
VFS = Full-Scale Differential Voltage(8) 0.7 • (2 • REFIN)/G
VOS = Offset Differential Voltage(8)
|
1.3 • (2 • REFIN)/G
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
ADS1210, 1211
2