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ADS1201U 参数 Datasheet PDF下载

ADS1201U图片预览
型号: ADS1201U
PDF下载: 下载PDF文件 查看货源
内容描述: 高动态范围Δ-Σ调制 [High Dynamic Range DELTA-SIGMA MODULATOR]
分类和应用: 转换器模数转换器光电二极管
文件页数/大小: 13 页 / 145 K
品牌: BB [ BURR-BROWN CORPORATION ]
 浏览型号ADS1201U的Datasheet PDF文件第3页浏览型号ADS1201U的Datasheet PDF文件第4页浏览型号ADS1201U的Datasheet PDF文件第5页浏览型号ADS1201U的Datasheet PDF文件第6页浏览型号ADS1201U的Datasheet PDF文件第8页浏览型号ADS1201U的Datasheet PDF文件第9页浏览型号ADS1201U的Datasheet PDF文件第10页浏览型号ADS1201U的Datasheet PDF文件第11页  
REFERENCE CIRCUIT  
ence is used, the correct connection configuration is shown  
in Figure 5a. The capacitor in this circuit is absolutely  
required if low noise performance is desired.  
There are two reference circuits included in the ADS1201  
converter: VREF (REFIN, REFOUT) and VBIAS. The circuitry  
for VREF is configured to allow the user to utilize the internal  
reference on the chip or provide an external reference to the  
converter (see Figure 5). The second reference, VBIAS, is  
derived from VREF, whether it is internal or external. VBIAS  
is exclusively an output reference. This ratiometric relation-  
ship between VREF and VBIAS reduces system errors when  
two separate bias voltages are required in the application.  
An external reference can be used to reduce the noise in the  
conversion process. If an external reference is used, care  
should be taken to insure that the selected reference has low  
noise performance. The appropriate connection circuit of an  
external reference is shown in Figure 5b. The reference must  
be configured with appropriate capacitors to reduce the high  
frequency noise that may be contributed by the reference.  
The input impedance of REFIN changes with the modulator  
clock frequency. The relationship is:  
REFERENCE INPUT (REFIN)  
The reference input (REFIN) of the ADS1201 can be config-  
ured so that the 2.5V (nominal) internal or external reference  
can be used in the conversion process. If the internal refer-  
1E12  
Typical REFIN Input Impedance =  
50 • fMCLK  
fMCLK  
X2  
X3  
X4  
X(t)  
fS  
Integrator 1  
Integrator 2  
MOUT  
VREF  
Comparator  
X6  
D/A Converter  
FIGURE 4. Block Diagram of a Second-Order Modulator.  
+5V  
1
2
3
4
5
6
7
8
AVDD  
REFOUT  
REFIN  
NIC  
REFEN 16  
MOUT 15  
MCLK 14  
DVDD 13  
DGND 12  
CAL 11  
1
2
3
4
5
6
7
8
AVDD  
REFOUT  
REFIN  
NIC  
REFEN 16  
MOUT 15  
MCLK 14  
DVDD 13  
DGND 12  
CAL 11  
External  
VREF  
1µF  
1µF  
ADS1201  
ADS1201  
AIN  
AIN  
P
N
AIN  
P
N
AIN  
AGND  
VBIAS  
GAIN/OFFSET 10  
BIASEN  
AGND  
VBIAS  
GAIN/OFFSET 10  
BIASEN  
9
9
(a) Internal Reference  
(b) External Reference  
FIGURE 5. Two Voltage Reference Connection Alternatives for the ADS1201.  
®
7
ADS1201