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ADS1100 参数 Datasheet PDF下载

ADS1100图片预览
型号: ADS1100
PDF下载: 下载PDF文件 查看货源
内容描述: 自校准, 16位模拟数字转换器 [Self-Calibrating, 16-Bit ANALOG-TO-DIGITAL CONVERTER]
分类和应用: 转换器
文件页数/大小: 13 页 / 187 K
品牌: BB [ BURR-BROWN CORPORATION ]
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puts codes in binary twos complement format, so the abso-  
lute values of the minima and maxima are not the same; the  
maximum n-bit code is 2n-1 1, while the minimum n-bit code  
THEORY OF OPERATION  
is 1 2n-1  
.
The ADS1100 is a fully differential, 16-bit, self-calibrating,  
delta-sigma A/D converter. Extremely easy to design with  
and configure, the ADS1100 allows you to take high-quality  
measurements with a minimum of effort.  
For example, the ideal expression for output codes with a  
data rate of 16SPS and PGA = 2 is:  
V
V  
IN  
(
)
(
)
IN  
+
The ADS1100 consists of a delta-sigma A/D converter core  
with adjustable gain, a clock generator, and an I2C interface.  
Each of these blocks are described in detail in the sections  
that follow.  
Output Code = 16384 2 •  
VDD  
The ADS1100 outputs all codes right-justified and sign-  
extended. This arrangement makes it possible to perform  
averaging on the higher data rate codes using only a 16-bit  
accumulator.  
ANALOG-TO-DIGITAL CONVERTER  
The ADS1100s A/D converter core consists of a differential  
switched-capacitor delta-sigma modulator followed by a digi-  
tal filter. The modulator measures the difference between the  
positive and negative analog inputs and compares this to a  
reference voltage, which, in the ADS1100, is the power  
supply. The digital filter receives a high-speed bitstream from  
the modulator and outputs a code, which is a number  
proportional to the input voltage.  
Output codes for various input levels are shown in Table II.  
SELF-CALIBRATION  
The previous expressions for the ADS1100s output code do  
not account for the gain and offset errors in the modulator. To  
compensate for these, the ADS1100 incorporates self-cali-  
bration circuitry.  
The self-calibration system operates continuously, and re-  
quires no user intervention. No adjustments can be made to  
the self-calibration system, and none need to be made. The  
self-calibration system cannot be deactivated.  
OUTPUT CODE CALCULATION  
The output code is a scalar value which is (except for clipping)  
proportional to the voltage difference between the two analog  
inputs. The output code is confined to a finite range of numbers;  
this range depends on the number of bits needed to represent  
the code. The number of bits needed to represent the output  
code for the ADS1100 depends on the data rate, as shown in  
Table I.  
The offset and gain error figures shown in the specifications  
table include the effects of calibration.  
CLOCK GENERATOR  
The ADS1100 features an onboard clock generator, which  
drives the operation of the modulator and digital filter. The  
Typical Characteristics show varieties in data rate over  
supply voltage and temperature.  
Data rate  
Number of Bits Minimum Code Maximum Code  
8SPS  
16SPS  
32SPS  
128SPS  
16  
15  
14  
12  
32768  
16384  
8192  
32767  
16383  
8191  
It is not possible to operate the ADS1100 with an external  
modulator clock.  
2048  
2047  
TABLE I. Minimum and Maximum Codes.  
INPUT IMPEDANCE  
For a minimum output code of Min Code, gain setting of  
PGA, positive and negative input voltages of VIN+ and VIN-  
and power supply of VDD, the output code is given by the  
expression:  
The ADS1100 uses a switched-capacitor input stage. To  
external circuitry, it looks roughly like a resistance. The  
resistance value, as with all switched-capacitor circuits, de-  
pends on the capacitor values and the rate at which they are  
switched. The switching frequency is the same as the modu-  
lator frequency; the capacitor values depend on the PGA  
setting. The switching clock is generated by the onboard  
clock generator, so its frequency, nominally 275 kHz, is  
somewhat dependent on supply voltage and temperature.  
,
V
V  
IN  
(
)
(
)
IN  
+
Output Code = 1Min Code PGA •  
VDD  
In the above expression, it is important to note that the  
negated minimum output code is used. The ADS1100 out-  
Input Signal  
Data Rate  
Negative Full-Scale  
1 LSB  
Zero  
+1 LSB  
Positive Full-Scale  
8 SPS  
16 SPS  
32 SPS  
128 SPS  
8000H  
C000H  
E000H  
F800H  
FFFFH  
FFFFH  
FFFFH  
FFFFH  
0000H  
0000H  
0000H  
0000H  
0001H  
0001H  
0001H  
0001H  
7FFFH  
3FFFH  
1FFFH  
07FFH  
TABLE II. Output Codes for Different Input Signals.  
ADS1100  
7
SBAS239  
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