Communication on the I2C bus always takes place between
two devices, one acting as the master and the other acting
as the slave. Both masters and slaves can read and write,
but slaves can only do so under the direction of the master.
Some I2C devices can act as masters or slaves, but the
ADS1100 can only act as a slave device.
Every byte transmitted on the I2C bus, whether it be address
or data, is acknowledged with an acknowledge bit. When a
master has finished sending a byte, eight data bits, to a
slave, it stops driving SDA and waits for the slave to acknowl-
edge the byte. The slave acknowledges the byte by pulling
SDA LOW. The master then sends a clock pulse to clock the
acknowledge bit. Similarly, when a master has finished
reading a byte, it pulls SDA LOW to acknowledge this to the
slave. It then sends a clock pulse to clock the bit. (Remember
that the master always drives the clock line.)
An I2C bus consists of two lines, SDA and SCL. SDA carries
data; SCL provides the clock. All data is transmitted across
the I2C bus in groups of eight bits. To send a bit on the I2C
bus, the SDA line is driven to the bit’s level while SCL is LOW
(a LOW on SDA indicates the bit is zero; a HIGH indicates
the bit is one). Once the SDA line has settled, the SCL line
is brought HIGH, then LOW. This pulse on SCL clocks the
SDA bit into the receiver’s shift register.
A not-acknowledge is performed by simply leaving SDA
HIGH during an acknowledge cycle. If a device is not present
on the bus, and the master attempts to address it, it will
receive a not-acknowledge because no device is present at
that address to pull the line LOW.
The I2C bus is bidirectional: the SDA line is used both for
transmitting and receiving data. When a master reads from
a slave, the slave drives the data line; when a master sends
to a slave, the master drives the data line. The master always
drives the clock line. The ADS1100 never drives SCL,
because it cannot act as a master. On the ADS1100, SCL is
an input only.
When a master has finished communicating with a slave, it
may issue a stop condition. When a stop condition is issued,
the bus becomes idle again. A master may also issue
another start condition. When a start condition is issued while
the bus is active, it is called a repeated start condition.
A timing diagram for an ADS1100 I2C transaction is shown in
Figure 1. Table III gives the parameters for this diagram.
Most of the time the bus is idle, no communication is taking
place, and both lines are HIGH. When communication is
taking place, the bus is active. Only master devices can start
a communication. They do this by causing a start condition
on the bus. Normally, the data line is only allowed to change
state while the clock line is LOW. If the data line changes
state while the clock line is HIGH, it is either a start condition
or its counterpart, a stop condition. A start condition is when
the clock line is HIGH and the data line goes from HIGH to
LOW. A stop condition is when the clock line is HIGH and the
data line goes from LOW to HIGH.
ADS1100 I2C ADDRESSES
The ADS1100 I2C address is 1001aaa, where “aaa” are bits
set at the factory. The ADS1100 is available in eight different
verisons, each having a different I2C address. For example,
the ADS1100A0 has address 1001000, and the ADS1100A3
has address 1001011. See the Package/Ordering Informa-
tion table for a complete listing.
The I2C address is the only difference between the eight
variants. In all other repsects, they operate identically.
After the master issues a start condition, it sends a byte that
indicates which slave device it wants to communicate with.
This byte is called the address byte. Each device on an I2C
bus has a unique 7-bit address to which it responds. (Slaves
can also have 10-bit addresses; see the I2C specification for
details.) The master sends an address in the address byte,
together with a bit that indicates whether it wishes to read
from or write to the slave device.
Each variant of the ADS1100 is marked with “ADx,” where x
identifies the address variant. For example, the ADS1100A0 is
marked “AD0”, and the ADS1100A3 is marked “AD3”. See the
Package/Ordering Information table for a complete listing.
When the ADS1100 was first introduced, it was shipped with
only one address, 1001000, and was marked “BAAI.” That
device is identical to the currently shipping ADS1100A0
variant marked “AD0”.
t(LOW)
tF
tR
t(HDSTA)
SCL
SDA
t(SUSTO)
t(HDSTA)
t(HIGH) t(SUSTA)
t(HDDAT)
t(SUDAT)
t(BUF)
P
S
S
P
FIGURE 1. I2C Timing Diagram.
ADS1100
8
SBAS239B
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