SYMBOL
PARAMETER
MIN
TYP
MAX
UNITS
Convert Mode
tDSC
tHEC
tSSC
tHSC
tSRC
tHRC
tSAC
tHAC
tC
STS Delay from CE
60
30
20
20
0
200
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
CE Pulse Width
50
50
50
50
50
0
CS to CE Setup
CS Low During CE High
R/C to CE Setup
R/C Low During CE High
AO To CE Setup
20
AO Valid During CE high
Conversion Time, 12 Bit Cycle
8 Bit Cycle
50
9
20
12
8
15
10
6
Read Mode
tDD
Access Time From CE
Data Valid After CE Low
Output Float Delay
75
35
100
0
150
150
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tHD
tHL
25
tSSR
tSRR
tSAR
tHSR
tHRR
tHAR
tHS
CS to CE Setup
50
0
R/C to CE Setup
AO to CE Setup
50
25
0
CS Valid After CE Low
R/C high After CE Low
AO Valid After CE Low
STS delay After Data Valid
0
50
300
100
600
NOTE: Specifications are at + 25°C and measured at 50% level of transitions.
TABLE IV. Timing Specifications
The STATUS output indicates the current state of the con-
verter by being in a high state only during conversion.
During this time the three state output buffers remain in a
high-impedance state, and therefore data cannot be read
during conversion. During this period additional transitions
of the three digital inputs which control conversion will be
ignored, so that conversion cannot be prematurely termi-
nated or restarted. However, if AO changes state after the
beginning of conversion, any additional start conversion
transition will latch the new state of AO, possibly resulting
in an incorrect conversion length (8 bits vs 12 bits) for that
conversion.
CE
CS
tSSR
tHSR
tHRR
R/C
AO
tSRR
tSAR
tHAR
READING OUTPUT DATA
STATUS
DB11-DB0
tHS
tHD
After conversion is initiated, the output data buffers remain
in a high-impedance state until the following four logic
conditions are simultaneously met: R/C high, STATUS low,
CE high, and CS low. Upon satisfaction of these conditions
the data lines are enabled according to the state of inputs
12/8 and AO. See Figure 4 and Table IV for timing relation-
ships and specifications.
High-Z
tDD
Data Valid
tHL
FIGURE 4. Read Cycle Timing.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
6
ADC674A
BB [ BURR-BROWN CORPORATION ]
