Total amplifier gain:
G = G1 • G2 = VOUT VIN
Input Stage:
Inverting Gain, Voltage or Current Input
The signal portion of Figure 4 shows two possible inverting
input stage configurations: current and input, and voltage
input.
(1)
(2)
G1 = 1 + (RA/FA)
(Select G1 to be less than 5V/full scale VIN to limit
demodulator output to 5V).
Input Stage:
For the voltage input case:
G1 = –RF/RS
(Select G1 to be less than 5V/full scale VIN
to limit the demodulator output voltage to 5V).
(8)
(9)
RA + RF ≥ 2MΩ
(Select to load input demodulator with at least 2MΩ).
(3)
RA (RF + 100kΩ)
RC = RA || (RF + 100kΩ) =
(4)
RF = 2MΩ
(Select to load the demodulator with
at least 2MΩ).
RA + RF + 100kΩ
(Balance impedances seen by the + and – inputs
of A1 to reduce input offset caused by bias current).
RS (RF + 100kΩ)
RC = RS || (R1 + 100kΩ) =
(10)
RS + RF + 100kΩ
Output Stage:
(Balance the impedances seen by the + and– inputs of A1).
(5)
(6)
G2 = 1 + (RX/RK)
(Select ratio to obtain VOUT between 5V and 10V
full scale with VIN at its maximum).
For the current input case:
VOUT = –IIN RF • G2
RC = RF
(11)
(12)
RX || RK = 100kΩ
(Balance impedances seen by the + and – inputs
of A2 to reduce effect of bias current on the
output offset).
RF may be made larger than 2MΩ if desired. The 10pF
capacitors are used to compensate for the input capacitance
of A1 and to insure frequency stability.
(7)
RB = RA + RF
(Load output demodulator equal to input demodulator).
Output Stage:
The output stage is the same as shown in equations (5), (6),
and (7).
RF = 2MΩ
100kΩ
9
10pF
2
10
D
M
6
14
D
RS
+
–
15
+
VOUT
A2
IIN
VIN
–
13
RB = 2MΩ
11
A1
17
16
RC
12
7
0.47µF
4
1
10pF
3
O/P PWR
0.47µF
19
+
–
Pulse GEN
20
I/P PWR
FIGURE 4. Power: Two-Port, Single Supply; Signal: Inverting Gains.
9
®
3656