SRAM
AS5C1008
Austin Semiconductor, Inc.
READ CYCLETIMING 1(1)
tRC
ADDR
DOUT
tAA
tOH
DATAVALID
PREVIOUS DATAVALID
NOTE: 1. CE\ is HIGH for READ cycle.
READ CYCLETIMING 2 (1)
CE\1
tRC
CE2
OE\
tACE
tAOE
(2)
tHZCE
tLZOE
tLZCE
tHZCE
DATAVALID
High-Z
DOUT
NOTES: 1. CE\ is HIGH for READ cycle.
2. At any given temperature and voltage condition, tHZCE is less than tLZCE
.
WRITE CYCLETIMING (WE\ CONTROLLED, OE\ = LOW)
tWC
ADDR
tAW
tAH
tCW
CE\1
CE2
tAS
tWP2
WE\
tLZWE
tDH
tDS
DIN
DATAVALID
High-Z
tHZWE
DOUT
UNDEFINED
DON’T CARE
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS5C1008
Rev. 3.6 6/05
6
AUSTIN [ AUSTIN SEMICONDUCTOR ]
