EEPROM
AS58C1001
Austin Semiconductor, Inc.
FUNCTIONAL DESCRIPTION
PROGRAMMING/ERASE
The 58C1001 does NOT employ a BULK-erase function.
AUTOMATIC PAGE WRITE
The memory cells can be programmed ‘0’ or ‘1’. A write cycle
The Page Write feature allows 1 to 128 Bytes of data to performs the function of erase & write on every cycle with
be written into the EEPROM in a single cycle and allows the the erase being transparent to the user. The internal erase data
undefined data within 128 Bytes to be written corresponding state is considered to be ‘1’. To program the memory array
with background of ALL 0’s or All 1’s, the user would
program this data using the page mode write operation to
program all 1024 128-byte pages.
to the undefined address (A0 to A6). Loading the first Byte of
data, the data load window of 30µs opens for the second. In
the same manner each additional Byte of data can be loaded
within 30µs. In case CE\ and WE\ are kept high for 100µs
after data input, the EEPROM enters erase and write
automatically and only the input data can be written into the
EEPROM. In Page mode the data can be written and accessed
DATA PROTECTION
To protect the data during operation and power on/off,
the AS58C1001 has:
1. Data protection against Noise on Control Pins (CE\,
OE\, WE\) during Operation. During readout or standby, noise
on the control pins may act as a trigger and turn the EEPROM
104 times per page, and in Byte mode 103 times per Byte.
DATA\ POLLING
Data\ Polling allows the status of the EEPROM to be to programming mode by mistake. To prevent this phenom-
determined. If the EEPROM is set to Read mode during a enon, the AS58C1001 has a noise cancellation function that
Write cycle, and inversion of the last Byte of data to be loaded cuts noise if its width is 20ns or less in programming mode.
outputs from I/O, to indicate that the EEPROM is performing Be careful not to allow noise of a width of more than 20ns on
a Write operation.
the control pins.
WRITE PROTECTION
(1) Noise protection: Noise on a write cycle will not act
as a trigger with a WE\ pulse of less than 20ns.
(2) Write inhibit: Holding OE\ low, WE\ high or CE\
high, inhibits a write cycle during power on/off.
WE\ AND CE\ PIN OPERATION
During a write cycle, addresses are latched by the falling
edge of WE\ or CE\, and data is latched by the rising edge of
WE\ or CE\.
WRITE/ERASE ENDURANCE AND
DATA RETENTION
The endurance with page programming is 104 cycles (1%
cumulative failure rate) and the data retention time is more
than 10 years when a device is programmed less than 104
cycles.
RDY/Busy\ SIGNAL
RDY/Busy\ signal also allows status of the EEPROM to
be determined. The RDY/Busy\ signal has high impedance
except in write cycle and is lowered to VOL after the first write
signal. At the end of the write cycle, the RDY/Busy\ signal
changes state to high impedance. This allows many 58C1001
devices RDY/Busy\ signal lines to be wired-OR together.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS58C1001
Rev. 4.0 3/01
3
AUSTIN [ AUSTIN SEMICONDUCTOR ]
