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A25L080 Series
A25L080 MEMORY ORGANIZATION
The memory is organized as:
1,048,576 bytes (8 bits each)
16 64-Kbytes blocks
Each page can be individually programmed (bits are
programmed from 1 to 0). The device is Sector, Block, or Chip
Erasable (bits are erased from 0 to 1) but not Page Erasable.
256 4-Kbytes sectors
4096 pages (256 bytes each).
Table 2. Memory Organization
A25L080 Address Table
Block
Sector
Address Range
255
0FF000h
0FFFFFh
15
240
239
0F0000h
0EF000h
0F0FFFh
0EFFFFh
14
13
12
11
10
9
224
223
0E0000h
0DF000h
0E0FFFh
0DFFFFh
208
207
0D0000h
0CF000h
0D0FFFh
0CFFFFh
192
191
0C0000h
0BF000h
0C0FFFh
0BFFFFh
176
175
0B0000h
0AF000h
0B0FFFh
0AFFFFh
160
159
0A0000h
09F000h
0A0FFFh
09FFFFh
144
143
090000h
08F000h
090FFFh
08FFFFh
8
128
127
080000h
07F000h
080FFFh
07FFFFh
7
112
111
070000h
06F000h
070FFFh
06FFFFh
6
96
95
060000h
05F000h
060FFFh
05FFFFh
5
80
79
050000h
04F000h
050FFFh
04FFFFh
4
64
63
040000h
03F000h
040FFFh
03FFFFh
3
48
47
030000h
02F000h
030FFFh
02FFFFh
2
32
31
020000h
01F000h
020FFFh
01FFFFh
1
16
15
010000h
00F000h
010FFFh
00FFFFh
3
2
1
0
003000h
002000h
001000h
000000h
003FFFh
002FFFh
001FFFh
000FFFh
0
(March, 2012, Version 1.6)
7
AMIC Technology Corp.
AMICC [ AMIC TECHNOLOGY ]
