Revision 1.26 - June 16, 2008
PowerPC 440SPe Embedded Processor
Data Sheet
Table 1. System Memory Address Map (Sheet 2 of 2)
Function
Sub Function
General Purpose Timers
Reserved
Start Address
End Address
Size
0000 0004 F000 0A00
0000 0004 F000 0B40
0000 0004 FF00 0000
0000 0005 0000 0000
0000 0008 0000 0000
0000 000C 0000 0000
0000 000C 0800 0000
0000 000C 0801 0000
0000 0004 F000 0B3F
0000 0004 FEFF FFFF
0000 0004 FFFF FFFF
0000 0007 FFFF FFFF
0000 000B FFFF FFFF
0000 000C 07FF FFFF
0000 000C 0800 FFFF
0000 000C 0EBF FFFF
320B
Boot ROM2, 3
EBC Bank0
16MB
16GB
64KB
Reserved
Local Memory Alias (HB)
Aliased DDR SDRAM
Reserved
PCIX0 I/O
Reserved
PCIX0 Addressing configuration
Regs
0000 000C 0EC0 0000
0000 000C 0EC0 0007
8B
Reserved
0000 000C 0EC0 0008
0000 000C 0EC8 0000
0000 000C 0EC8 1000
0000 000C 0EC8 1100
0000 000C 0EC8 1200
0000 000C 0ED0 0000
0000 000C 0EE0 0000
0000 000C 1000 0000
0000 000C FF00 0000
0000 000D 0000 0000
0000 0010 0000 0000
0000 000C 0EC7 FFFF
0000 000C 0EC8 0FFF
0000 000C 0EC8 10FF
0000 000C 0EC8 11FF
0000 000C 0ECF FFFF
0000 000C 0EDF FFFF
0000 000C 0FFF FFFF
0000 000C FEFF FFFF
0000 000C FFFF FFFF
0000 000F FFFF FFFF
0FFF FFFF FFFF FFFF
PCIX0 Core Configuration Regs
Reserved
4KB
256B
1MB
PCI Space (HB)
PCIX0 Simple Message Passing
Reserved
PCIX0 Special Cycle
Reserved
PCI Memory (PCI-Express & PCI-X)
PCI-X DDR boot ROM (PCI memory
PCI Memory (PCI-Express & PCI-X)
3.8GB
16MB
12GB
Reserved4
Reserved5
1000 0000 0000 0000
2000 0000 0000 0000
1FFF FFFF FFFF FFFF
FFFF FFFF FFFF FFFF
PCI Core Space (HB)
PCI Memory (PCI-Express & PCI-X)
Notes:
1. DDR SDRAM and on-chip SRAM can be located anywhere in the Local Memory area of the memory map.
2. The Boot ROM and Expansion ROM areas of the memory map are intended for use by ROM or Flash-type devices. While locating
volatile DDR SDRAM and SRAM in this region is supported, use of these regions for this purpose is not recommended.
3. When the optional boot from PCI-X memory is selected, the PCI-X Boot ROM address space begins at C FF00 0000 (16 MB).
4. Never decoded.
5. Unpredictable results on Read and Write operations.
6. Accessed by means of EBC Peripheral Bank Configuration Registers.
AMCC Proprietary
7
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
