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CS3160 参数 Datasheet PDF下载

CS3160图片预览
型号: CS3160
PDF下载: 下载PDF文件 查看货源
内容描述: 2.5 Gbps的宽带互阻抗放大器 [2.5 Gbps Wide Bandwidth Transimpedance Amplifier]
分类和应用: 放大器
文件页数/大小: 11 页 / 173 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision A – August 12, 2004  
S3160 – 2.5 Gbps Wide Bandwidth Transimpedance Amplifier  
Data Sheet  
The output of the transimpedance stage is converted  
to a differential signal by the combination of the output  
stage and a bias block. This bias block averages the  
output of the transimpedance stage and establishes  
the DC input reference for the output stage. The band-  
width of this circuit is set by an on-chip capacitor, but  
DETAILED DESCRIPTION  
Figure 2 depicts the overall block diagram of the  
S3160 transimpedance amplifier. The amplifier cir-  
cuitry consists of a transimpedance stage and an  
output driver stage with a 6 dB gain. The transimped-  
ance amplifier converts the photodiode photocurrent to  
a voltage. The photodiode can be biased by connect-  
ing it to the RBYPASS pin or it can be connected  
can be reduced by adding an off-chip capacitor, C  
.
FILT  
This bandwidth corresponds to the low frequency -3 dB  
cutoff of the TIA. Increasing the value of C  
will  
FILT  
directly to V  
.
CC  
reduce the low frequency -3 dB cutoff. With no C  
capacitor added it will be at 45 kHz.  
FILT  
The amplifier gain is linear for an input of up to 300 µA.  
Above that the transimpedance of the input stage is  
reduced by the action of the schottky diode, to prevent  
overdrive of the output stage. The output of the output  
stage begins to fully limit when the input current  
reaches 700 µA. The output voltage is limited at 1000  
mV, differential, peak to peak.  
Figure 2. S3160 Detailed Block Diagram  
V
CC  
CFILT  
(OPTIONAL)  
RBYPASS  
V
FILT  
CC  
100 Ω  
OUTP  
OUTN  
X 2  
IIN  
BIAS  
1500 Ω  
GND  
2
AMCC Confidential and Proprietary