EN5312QI
Ra must be chosen as 200KΩ to maintain loop
gain. Then Rb is given as:
1.2x105
=
Ω
Rb
VOUT − 0.603
VOUT can be programmed over the range of
0.6V to VIN – 0.6V (0.6 is the nominal full load
dropout voltage including margin).
Table 1. VID voltage select settings.
ENABLE
VSense
VOUT
VIN
VS2
0
0
0
0
VS1
0
0
1
1
VS0
0
1
0
1
VOUT
Vin
Vout
Ca
3.3V
4.7uF
10µF
27pF
Ra
Rb
2.5V
1.8V
1.5V
1.25V
1.2V
VFB
VS0
VS1
VS2
GND
1
1
0
0
0
1
1
1
1
1
0
1
0.8V
User
Selectable
Figure 5. External Divider (VIN > 5.5V).
External Voltage Divider
For applications where VIN > 5.5V, the VSENSE
connection is not necessary, but the addition of
CA = 27pF is required.
As described above, the external voltage
divider option is chosen by connecting the
VS0, VS1, and VS2 pins to VIN or logic “high”.
The EN5312QI uses a separate feedback pin,
VFB, when using the external divider.
Dynamically Adjustable Output
The EN5312QI is designed to allow for
dynamic switching between the predefined VID
voltage levels. The inter-voltage slew rate is
optimized to prevent excess undershoot or
overshoot as the output voltage levels
transition. The slew rate is identical to the soft-
start slew rate of 1.65V/mS.
For applications with VIN ≤ 5.5V, VSENSE must
be connected to VOUT as indicated in Figure
4.
Figure 5 indicates the required connections for
VIN > 5.5V.
ENABLE
VSense
Dynamic transitioning between internal VID
settings and the external divider is not allowed.
VOUT
VIN
Vin
Vout
4.7uF
10µF
Ra
Rb
VFB
VS0
VS1
VS2
Input and Output Capacitors
GND
The input capacitance requirement is 4.7uF.
Altera recommends that a low ESR MLCC
capacitor be used. The input capacitor must
use a X5R or X7R or equivalent dielectric
Figure 4. External Divider (VIN ≤ 5.5V).
The output voltage is selected by the following
formula:
formulation.
Y5V or equivalent dielectric
formulations lose capacitance with frequency,
bias, and with temperature, and are not
Ra
Rb
VOUT = 0.603V
1+
9
www.altera.com/enpirion
04535
December 14, 2015
Rev E
ALTERA [ ALTERA CORPORATION ]
