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AS6UA25617-70TC 参数 Datasheet PDF下载

AS6UA25617-70TC图片预览
型号: AS6UA25617-70TC
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 256KX16, 70ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44]
分类和应用: 静态存储器光电二极管内存集成电路
文件页数/大小: 9 页 / 216 K
品牌: ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
 浏览型号AS6UA25617-70TC的Datasheet PDF文件第1页浏览型号AS6UA25617-70TC的Datasheet PDF文件第2页浏览型号AS6UA25617-70TC的Datasheet PDF文件第3页浏览型号AS6UA25617-70TC的Datasheet PDF文件第5页浏览型号AS6UA25617-70TC的Datasheet PDF文件第6页浏览型号AS6UA25617-70TC的Datasheet PDF文件第7页浏览型号AS6UA25617-70TC的Datasheet PDF文件第8页浏览型号AS6UA25617-70TC的Datasheet PDF文件第9页  
AS6UA25617  
Read cycle (over the operating range)  
–55  
–70  
–100  
Parameter  
Read cycle time  
Symbol Min  
Max  
Min  
70  
Max  
Min  
100  
Max  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Notes  
tRC  
tAA  
tACS1,2  
tOE  
55  
Address access time  
55  
55  
25  
70  
70  
35  
100  
100  
50  
3
3
Chip selects access time  
Output enable (OE) access time  
Output hold from address change  
Chip selects low to output in low Z  
Chip selects high to output in high Z  
OE low to output in low Z  
UB/ LB access time  
tOH  
10  
10  
0
10  
10  
0
15  
10  
0
5
tCLZ  
tCHZ  
tOLZ  
tBA  
4, 5  
4, 5  
4, 5  
20  
20  
20  
5
5
5
55  
70  
100  
UB/ LB low to low Z  
tBLZ  
tBHZ  
tOHZ  
tPU  
10  
0
10  
0
10  
0
4, 5  
4, 5  
4, 5  
4, 5  
4, 5  
UB/ LB high to high Z  
20  
20  
20  
20  
20  
20  
OE high to output in high Z  
Power up time  
0
0
0
0
0
0
Power down time  
tPD  
55  
70  
100  
Shaded areas indicate preliminary information.  
Key to switching waveforms  
Rising input  
Falling input  
Undefined/ dont care  
Read waveform 1 (address controlled)  
t
RC  
Address  
t
AA  
t
t
OH  
OH  
D
Previous data valid  
Data valid  
OUT  
Read waveform 2 (chip selects, OE, UB, LB controlled)  
t
RC  
Address  
t
AA  
OE  
t
OE  
t
t
t
OH  
OLZ  
OLZ  
CS1  
t
t
t
OHZ  
LZ  
t
t
t
t
HZ  
OHZ  
ACS1  
ACS1  
LZ  
CS2  
t
OH  
t
t
HZ  
OE  
LB, UB  
t
t
BHZ  
BA  
t
BLZ  
D
Data valid  
OUT  
4