A24C256
AiT Semiconductor Inc.
www.ait-ic.com
MEMORY EEPROM
256k BITS (32768 X 8) TWO-WIRE SERIAL
DETAILED INFORMATION
DEVICE/PAGE ADDRESSES (A2, A1 and A0): The A2, A1 and A0 pins are device address inputs that are
hard wire for the A24C256. Eight 256k devices may be addressed on a single bus system (device addressing
is discussed in detail under the Device Addressing section).
SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and
may be wire-ORed with any number of other open-drain or open- collector devices.
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and
negative edge clock data out of each device.
WRITE PROTECT (WP): The A24C256 has a Write Protect pin that provides hardware data protection. The
Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write
Protection pin is connected to VCC, the write protection feature is enabled and operates as shown in the
following Table 1.
Table1: Write Protect
WP Pin Status
At VCC
A24C256
Full (256k) Array
At GND
Normal Read/Write Operations
REV2.0
- MAY 2009 RELEASED, NOV 2016 UPDATED -
- 7 -
AITSEMI [ AiT Semiconductor ]
