Quad Differential Drivers
BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA
Data Sheet
January 1999
Timing Characteristics
Table 4. Timing Characteristics (See Figures 2 and 3.)
For tP1 and tP2 propagation delays over the temperature range, see Figure 9.
Propagation delay test circuit connected to output (see Figure 6).
TA = –40 °C to +125 °C, VCC = 5 V ± 0.5 V.
Parameter
Propagation Delay:
Symbol
Min
Typ
Max
Unit
Input High to Output†
Input Low to Output†
tP1*
tP2*
∆tp
0.8
0.8
—
1.2
1.2
2.0
2.0
ns
ns
Capacitive Delay
0.02
0.03
ns/pF
Disable Time (either E1 or E2):
High-to-high Impedance
Low-to-high Impedance
Enable Time (either E1 or E2):
High Impedance to High
High Impedance to Low
Output Skew, |tP1 – tP2|
|tPHH – tPHL|, |tPLH – tPLL|
Difference Between Drivers
Rise Time (20%—80%)
Fall Time (80%—20%)
tPHZ
tPLZ
4
4
8
8
12
12
ns
ns
tPZH
tPZL
4
8
12
12
0.3
0.5
0.3
2
ns
ns
ns
ns
ns
ns
ns
4
8
tskew1
tskew2
∆tskew
ttLH
—
—
—
—
—
0.1
0.2
—
0.7
0.7
ttHL
2
* tP1 and tP2 are measured from the 1.5 V point of the input to the crossover point of the outputs (see Figure 2).
† CL = 5 pF. Capacitor is connected from each output to ground.
Lucent Technologies Inc.
5
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