Quad Differential Drivers
BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA
Data Sheet
January 1999
Timing Characteristics (continued)
2.4 V
INPUT
TRANSITION
1.5 V
0.4 V
tP1
tP2
VOH
VOL
OUTPUTS
OUTPUT
tPHH
tPLL
VOH
(VOH + VOL)/2
VOL
VOH
OUTPUT
OUTPUT
(VOH + VOL)/2
VOL
tPHL
tPLH
VOH
VOL
80%
80%
20%
20%
ttHL
ttLH
12-2677F
Figure 2. Driver Propagation-Delay Timing
3.0 V
1.3 V
0.0 V
E1*
3.0 V
1.3 V
0.0 V
†
E2
tPHZ
tPZH
VOH
VOL + 0.2 V
VOL
OUTPUT
OUTPUT
VOL – 0.1 V
VOL
VOL – 0.1 V
tPLZ
tPZL
12-2268.dC
* E2 = 1 while E1 changes state.
† E1 = 0 while E2 changes state.
Note: In the third state, both outputs (i.e., OUTPUT and OUTPUT) are 0.2 V below the low state.
Figure 3. Driver Enable and Disable Timing for a High Input
6
Lucent Technologies Inc.
AGERE [ AGERE SYSTEMS ]
