Data Sheet
November 1999
L7582 Tip Ring Access Switch
Pin Information (continued)
Table 1. Pin Descriptions
DIP SOG Symbol
Description
Fault ground.
DIP SOG Symbol
Description
1
1
FGND
16
16
VBAT
Battery voltage. Used as a ref-
erence for protection circuit.
2
3
4
2
3
4
TBAT
Connect to TIP on SLIC side.
Connect to TIP on line side.
15
14
15
14
13
RBAT
Connect to RING on SLIC side.
Connect to RING on line side.
TLINE
RLINE
TRINGING Connect to return ground for ring- 13
ing generator.
RRINGING Connect to ringing generator.
5
6
5
6
TACCESS Test access.
12
11
12
11
RACCESS Test access.
VDD
5 V supply.
LATCH Data latch control, active-high,
transparent low.
7
7
TSD
Temperature shutdown pin. Can
be used as a logic level input or
output. See Table 13, Truth Table,
and the Switching Behavior sec-
tion of this data sheet for input pin
description. As an output, will
read 5 V when device is in its
operational mode and 0 V in the
thermal shutdown mode. To dis-
able the thermal shutdown mech-
anism, tie this pin to 5 V (not
recommended).
10
10
INRING Logic level input switch control.
8
8
DGND
Digital ground.
9
9
INACCESS Logic level input switch control.
Absolute Maximum Ratings
Handling Precautions
Stresses in excess of the absolute maximum ratings
can cause permanent damage to the device. These are
absolute stress ratings only. Functional operation of the
device is not implied at these or any other conditions in
excess of those given in the operational sections of the
data sheet. Exposure to absolute maximum ratings for
extended periods can adversely affect device reliability.
Although protection circuitry has been designed into
this device, proper precautions should be taken to
avoid exposure to electrostatic discharge (ESD) during
handling and mounting. Lucent Technologies Micro-
electronics Group employs a human-body model
(HBM) and a charged-device model (CDM) for ESD-
susceptibility testing and protection design evaluation.
ESD voltage thresholds are dependent on the circuit
parameters used to define the model. No industry-wide
standard has been adopted for CDM. However, a stan-
dard HBM (resistance = 1500 Ω, capacitance = 100 pF)
is widely used and therefore can be used for compari-
son purposes. The HBM ESD threshold presented
here was obtained by using these circuit parameters.
Table 2. Absolute Maximum Ratings Parameters
Parameter
Min
–40
–40
5
Max Unit
Operating Temperature Range
Storage Temperature Range
Relative Humidity Range
110
150
95
°C
°C
%
Pin Soldering Temperature (t =
10 s max)
—
260
°C
Table 3. HBM ESD Threshold Voltage
5 V Power Supply
Battery Supply
—
—
—
—
—
7
V
V
V
V
V
Device
Rating
–85
7
L7582
1000 V
Logic Input Voltage
Input-to-output Isolation
Pole-to-pole Isolation
330
330
Lucent Technologies Inc.
3
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