Data Sheet
January 2000
1340-Type Lightwave Receiver
A single 50 Ω resistor terminated to (VCC – 2 V) could
also be used, but this requires a second power supply.
Other methods of terminating ECL-type outputs are
discussed in the references previously mentioned.
Pin 10
Pin 10 on the 1340-Type receiver is a not internally
connected (NIC) pin. This definition allows the 1340 to
be used in most customer 20-pin receiver module
applications. Customer’s printed-wiring boards that are
designed with ground, +5V, –5V, or no connection to
this pin are all acceptable options. For those applica-
tions that require monitoring the photocurrent of the
PIN photodetector for power monitoring purposes,
there are versions of the 1340 that require +5 V or –5 V
applied to Pin 10. CheckTables 4 and 5 for ordering
information.
Figure 5 shows an example of a circuit that can be
used to interface the PECL outputs of the 1340 receiver
with a device which requires true, negative voltage ECL
inputs. The 100314 is an ECL line receiver and is
shown here only as an example to demonstrate this
coupling procedure. The DATA lines are terminated in a
50 Ω equivalent impedance but are ac-coupled to the
100314. The capacitive coupling isolates and permits
level shifting of the positiveDATA outputs of the
receiver to the proper negative level required by the
inputs of the 100314. The VBB output of the 100314
provides the reference voltage required to center the
voltage swing of theDATA signals around the input
switching threshold of the 100314. The Thévenin
equivalent of the 166 Ω and 250 Ω resistor pair is
100 Ω, which, in parallel with the 100 Ω resistor con-
nected to VBB, results in a 50 Ω equivalent impedance
for the load on each of the data lines. Alternatively, if
there is no VBB reference available, a second pair of
166 Ω/250 Ω resistor networks could be used on the
data lines on the 100314 side of the coupling capacitor.
Recommended User Interface
The 1340 receiver is designed to be operated from a
5 V power supply and provides raised or pseudo-ECL
(PECL) data outputs. Figures 3 and 4 show two possi-
ble application circuits for the 1340 receiver. Figure 3
represents an application for the version with PECL
FLAG outputs while Figure 4 shows a possible applica-
tion for the version with the TTL-compatible FLAG
outputs.
In both instances, theDATA outputs are terminated with
a Thévenin equivalent circuit, which provides the equiv-
alent of a 50 Ω load terminated to (VCC – 2 V).
+5.0 V
†
2.2 µF
FERRITE
‡
BEAD
0.1 µF
0.1 µF
0.1 µF
82 •
0.1 µF
11
12
14
82 •
82 •
82 •
9
7
†
†
FLAG*
DATA
DATA
1340
FLAG*
124 •
124 •
124 •
124 •
1-500(C).d
* 50 Ω to (VCC – 2)V.
† DATA and DATA are 50 Ω impedance transmission lines; both lines can be ac- or dc-coupled into the next device.
‡ Fair-Rite Products Corporation part number 2743037447 or equivalent.
Note: All unused outputs must be terminated as shown. All resistors are 1/8 W, thin-film, ceramic chips. All capacitors are
25 Vdc, ceramic X7R, or equivalent.
Figure 3. Interfacing to the 155 Mbits/s 1340 Receiver
Agere Systems Inc.
5
AGERE [ AGERE SYSTEMS ]
