ACT8332
Rev1, 24-May-10
STEP-DOWN DC/DC CONVERTER
Figure 4:
Output Voltage Programming
Finally choose CFF using the following equation:
2.2 ×10 −6
CFF
=
(2)
RFB1
where RFB1 = 47kꢀ, use 47pF.
PCB Layout Considerations
High switching frequencies and large peak currents
make PC board layout an important part of step-
down DC/DC converter design. A good design mini-
mizes excessive EMI on the feedback paths and volt-
age gradients in the ground plane, both of which can
result in instability or regulation errors. Step-down
DC/DCs exhibit discontinuous input current, so the
input capacitors should be placed as close as possi-
ble to the IC, and avoiding the use of vias if possible.
The inductor, input filter capacitor, and output filter
capacitor should be connected as close together as
possible, with short, direct, and wide traces. The
ground nodes for each regulator's power loops
should be connected at a single point in a star-
ground configuration, and this point should be con-
nected to the backside ground plane with multiple
vias. For fixed output voltage options, connect the
output node directly to the FB1 pin. For adjustable
output voltage options, connect the feedback resis-
tors and feed-forward capacitor to the FB1 pin
through the shortest possible route. In both cases,
the feedback path should be routed to maintain suffi-
cient distance from switching nodes to prevent noise
injection. Finally, the exposed pad should be directly
connected to the backside ground plane using multi-
ple vias to achieve low electrical and thermal resis-
tance.
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