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5962-0151502QXC 参数 Datasheet PDF下载

5962-0151502QXC图片预览
型号: 5962-0151502QXC
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 72000 Gates, 139MHz, 6036-Cell, CMOS, CQFP256, CERAMIC, QFP-256]
分类和应用: 时钟可编程逻辑
文件页数/大小: 21 页 / 171 K
品牌: ACTEL [ Actel Corporation ]
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1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,  
appendix A for device class M.  
1.3 Absolute maximum ratings (for 2.5V/3.3V/5.0V operating conditions). 4/  
DC supply voltage range (V  
DC supply voltage range (V  
) ....................................................... -0.3 to +6.0 V dc  
CCI  
) ...................................................... -0.3 to +3.0 V dc  
CCA  
Input voltage range (V ) .................................................................... -0.5 to +6.0 V dc  
I
Input voltage(VI) for bi-directional I/Os when using 3.3V PCI ............ -0.5 to (+V  
Output voltage range (V ) ................................................................ -0.5 to (+V  
+0.5) V dc  
+0.5) V dc  
CCI  
CCI  
O
Storage temperature range (V  
) .................................................. -65 oC to +150 oC  
STG  
Lead temperature (soldering, 10 seconds) ....................................... 300 oC  
Thermal resistance, junction-to-case (Θ for Case X and Y) .......... 0.5 oC/W  
JC  
Maximum junction temperature (T ) ................................................. 150 oC  
J
1.4 Recommended operating conditions.  
3.3V power supply voltage range ...................................................... 3.0 to 3.6 V dc (±10% V  
5.0V power supply voltage range ...................................................... 4.5 to 5.5 V dc (±10% V  
)
)
CCI  
CCI  
2.5V power supply voltage range ...................................................... 2.25 to 2.75 V dc (±10% V  
)
CCA  
Case operating temperature range (T ) ........................................... -55 oC to +125 oC  
C
Input transition time T and T ........................................................ 10 ns 5/  
R
F
1.5 Digital logic testing for device classes Q and V.  
Fault coverage measurement of manufacturing  
logic tests (MIL-STD-883, test method 5012) .................................... 100 percent 6/  
2. APPLICABLE DOCUMENTS  
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part  
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the  
solicitation or contract.  
DEPARTMENT OF DEFENSE SPECIFICATION  
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.  
DEPARTMENT OF DEFENSE STANDARDS  
MIL-STD-883  
-
Test Method Standard Microcircuits.  
MIL-STD-1835 - Interface Standard For Microcircuit Case Outlines.  
DEPARTMENT OF DEFENSE HANDBOOKS  
MIL-HDBK-103 - List of Standard Microcircuit Drawings.  
MIL-HDBK-780 - Standard Microcircuit Drawings.  
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the  
Standardization Document Order Desk, 700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.)  
4/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the  
maximum levels may degrade performance and affect reliability.  
5/ If T and T exceeds the limit of 10 ns, the device manufacturer cannot guarantee device functionality.  
R
F
6/ 100 percent test coverage of blank programmable logic devices.  
SIZE  
STANDARD  
5962-01515  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43218-3990  
REVISION LEVEL  
E
SHEET  
3
DSCC FORM 2234  
APR 97