A-Data
ADS6616A4A
AC Characteristics
-5
-6
-7
-7.5
Parameter
Symbol
Unit Note
Min Max Min Max Min Max Min Max
System clock /CAS Latency = 3 tCK3
Cycle time
5
7
6
7.5
2
7
8
7
8
1000
1000
1000
1000 ns
/CAS Latency = 2 tCK2
Clock high pulse width
Clock low pulse width
tCHW
tCLW
1.5
1.5
-
-
-
-
2
-
-
2
-
-
ns
ns
1
1
-
4.5
5.5
-
2
2
2
Access time /CAS Latency = 3 tAC3
5
5.5
-
-
5.5
6
-
-
5.5
6
-
ns
2
form clock
/RAS cycle
time
/CAS Latency = 2 tAC2
-
-
-
Operation
tRC
54
54
14
60
60
18
65
65
20
65
65
20
ns
ns
Auto Refresh
tRRC
tRCD
tRAS
tRP
-
-
-
-
/RAS to /CAS delay
/RAS active time
-
-
-
-
40 100K 42 100K 42 120K 42 120K ns
/RAS precharge time
/RAS to /RAS bank active delay
/CAS to /CAS delay
Data – out hold time
Data – input setup time
Data – input hold time
Address setup time
Address hold time
CKE setup time
14
10
1
-
-
-
-
-
-
-
-
-
-
-
-
-
18
12
1
-
-
-
-
-
-
-
-
-
-
-
-
-
20
14
1
-
-
-
-
-
-
-
-
-
-
-
-
-
20
14
1
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
tRRD
tCCD
tOH
CLK
ns
1.5
1.5
1
2
2
2
tDS
1.5
1
1.5
1
1.5
1
ns
1
1
1
1
1
1
1
1
tDH
ns
tAS
1.5
1
1.5
1
1.5
1
1.5
1
ns
tAH
ns
tCKS
tCKH
tCS
1.5
1
1.5
1
1.5
1
1.5
1
ns
CKE hold time
ns
Command setup time
Command hold time
Refresh time
1.5
1
1.5
1
1.5
1
1.5
1
ns
tCH
ns
tREF
64
64
64
64
ms
Note : 1. Assume tR / tF (input rise and fall time) is 1 ns.
2. Access times to be measured with input signals of 1v / ns edge rate.
3.A new command can be given tRRC after self refresh exit.
Rev 1.1 April, 2001
6
ADATA [ ADATA Technology Co., Ltd. ]
